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| Back CS3524A Voltage Mode PWM Control Circuit with 200 mA Output Drivers The CS3524A PWM control circuit retains the same versatile architecture of the industry standard CS3524 (SG3524) while adding substantial improvements. The CS3524 is pin-compatible with "non-A" versions, and in most applications can be directly interchanged. The CS3524A, however, eliminates many of the design restrictions which had previously required additional external circuitry. The CS3524A includes a precision 5.0 V reference trimmed to 1% accuracy (eliminating the need for potentiometer adjustments), an error amplifier with an output voltage swing extending to 5.0 V, and a current sense amplifier useful in either the ground or power supply output lines. The uncommitted 60 V, 200 mA NPN output pair greatly enhances the output drive capability. The CS3524A features an undervoltage lockout circuit which disables all internal circuitry (except the reference) until the input voltage has risen to 8.0 V. This holds standby current low until turn-on, and greatly simplifies the design of low power, off-line supplies. The turn-on circuit has approximately 600 mV of hysteresis for jitter free activation. Other improvements include a PWM latch that insures freedom from multiple pulsing within a period, even in noisy environments; logic to eliminate double pulsing on a single output, a 200 ns external shutdown capability, and automatic thermal protection from excessive chip temperature. The oscillator circuit is usable to 500 kHz and is easier to synchronize with an external clock pulse. Features Precision Reference Internally Trimmed to 1% Current Limit Undervoltage Lockout Start-Up Supply Current < 4.0 mA Output to 200 mA 60 V Output Capability Wide Common-Mode Input Range for Error and Current Limit Amplifiers * PWM Latch Insures Single Pulse per Period * Double Pulse Suppression * 200 ns Shutdown * Guaranteed Frequency * Thermal Shutdown http://onsemi.com MARKING DIAGRAMS 16 1 DIP-16 N SUFFIX CASE 648 1 16 CS3524A AWLYYWW 16 16 1 SO-16L DW SUFFIX CASE 751G A WL, L YY, Y WW, W CS3524A AWLYYWW 1 = Assembly Location = Wafer Lot = Year = Work Week * * * * * * * PIN CONNECTIONS EA- EA+ SYNC ISENSE+ ISENSE- RT CT GND 1 VREF VIN EB VOUTB VOUTA EA SHUTDOWN COMP ORDERING INFORMATION Device CS3524AGN16 CS3524AGDW16 CS3524AGDWR16 Package DIP-16 SO-16L Shipping 25 Units/Rail 46 Units/Rail SO-16L 1000 Tape & Reel (c) Semiconductor Components Industries, LLC, 2001 1 December, 2000 - Rev. 3 Publication Order Number: CS3524A/D CS3524A VIN SYNC RT OSC CT RAMP COMP EA- EA+ 200 mV ISENSE+ CL ISENSE- + COMP - S S UV Sense CLOCK 5 V Reference Regulator Power to Internal Circuitry VREF VOUTA Flip T Flop EA R PWM Latch VOUTB EB VIN - EA + VIN 1 k SHUTDOWN 10 k GND Figure 1. Block Diagram ABSOLUTE MAXIMUM RATINGS* Rating Supply Voltage (VIN) Collector Supply Voltage (VCC) Output Current (Each Output) Reference Output Current Oscillator Charging Current Power Dissipation at TA = 25C Power Dissipation at TJ = +25C Derate for Case Temperature above +25C Storage Temperature Range Lead Temperature Soldering 1. 10 seconds max. 2. 60 seconds max above 183C *The maximum package power dissipation must be observed. Wave Solder (through hole styles only) Note 1. Reflow (SMD styles only) Note 2. Value 40 60 200 50 5.0 1000 2000 16 -65 to +150 260 peak 230 peak Unit V V mA mA mA mW mW mW/C C C C http://onsemi.com 2 CS3524A ELECTRICAL CHARACTERISTICS (0C TA +70C, VIN = VCC = 20 V; unless otherwise specified.) Characteristic Turn-On Characteristics Input Voltage Turn-On Threshold Turn-On Current Operating Current Turn-On Hysteresis (Note 3.) Reference Section Output Voltage Line Regulation Load Regulation Temperature Stability (Note 3.) Short Circuit Current Output Noise Voltage (Note 3.) Long Term Stability (Note 3.) Oscillator Section Initial Accuracy Temperature Stability (Note 3.) Minimum Frequency Maximum Frequency Output Amplitude (Note 3.) Output Pulse Width (Note 3.) Ramp Peak Ramp Valley Error Amplifier Section Input Offset Voltage Input Bias Current Input Offset Current Common Mode Rejection Ratio Power Supply Rejection Ratio Output Swing Open Loop Voltage Gain Gain-Bandwidth (Note 3.) Current Limit Amplifier Input Offset Voltage Input Offset Voltage Input Bias Current Common Mode Rejection Ratio Power Supply Rejection Ratio VSENSE = 0 to 15 V VIN = 10 to 40 V VCM = 1.5 to 5.5 V VIN = 10 to 40 V Minimum Total Range VOUT = 1.0 to 4.0 V, RL 10 M TA = 25C, AV = 0 dB VSENSE = VO; unless otherwise specified TA = 25C, EA Set for Max. Output Over Operating Temperature Range - 180 170 - 50 50 200 - -1.0 60 60 220 230 -10 - - mV mV A dB dB TA = 25C VIN = 10 to 40 V IL = 0 to 20 mA Over Operating Range VREF = 0, TA = 25C 10 Hz f 10 kHz, TA = 25C TA = 125C, 1000 Hrs. 4.9 - - - - - - 5.0 10 20 20 80 40 20 5.2 30 50 50 100 - 50 V mV mA mV mA VRMS mV Operating Range after Turn-On - VIN Turn-On - 100 mV VIN = 8.0 to 40 V - 8.0 5.5 - - - - 7.5 2.5 5.0 0.6 40 8.5 4.0 10 - V V mA mA V Test Conditions Min Typ Max Unit RT = 2700 W, CT = 0.01 mF; unless otherwise specified TA = 25C Over Operating Temperature Range RT = 150 k, CT = 0.1 F RT = 2.0 k, CT = 470 pF TA = 25C TA = 25C - - VCM = 2.5 V; unless otherwise specified - - - - - - 60 50 0.5 60 - 2.0 1.0 0.5 75 60 - 80 3.0 10 10 1.0 - - 5.0 - - mV A A dB dB V dB MHz 39 - - 500 - - 3.3 0.7 43 1.0 - - 3.5 0.5 3.5 0.9 47 2.0 120 - - - 3.7 1.0 kHz % Hz kHz V s V V 3. These parameters are guaranteed by design but not 100% tested in production. http://onsemi.com 3 CS3524A ELECTRICAL CHARACTERISTICS (continued) (0C TA +70C, VIN = VCC = 20 V; unless otherwise specified.) Characteristic Current Limit Amplifier (continued) Output Swing Open Loop Voltage Gain Delay Time (Note 4.) Output Section (Each Output) Collector Emitter Voltage Collector Leakage Current Saturation Emitter Output Voltage Rise Time (Note 4.) Fall Time (Note 4.) Comparator Delay (Note 4.) Shutdown Delay (Note 4.) Shutdown Threshold Thermal Shutdown (Note 4.) IC = 100 A VCE = 50 V IC = 20 mA IC = 200 mA IE = 50 mA TA = 25C, R = 2.0 k TA = 25C, R = 2.0 k TA = 25C, VCOMP to VOUT TA = 25C, VSHUT to VOUT TA = 25C, RC = 2.0 k - 60 - - - 17 - - - - 0.5 - 80 0.1 0.2 1.0 18 200 100 300 200 0.7 165 - 20 0.4 2.2 - - - - - 1.0 - V A V V V ns ns ns ns V C Test Conditions VSENSE = VO; unless otherwise specified Minimum Total Range VOUT = 1.0 to 4.0 V, RL 10 M VIN = 300 mV 0.5 70 - - 80 300 5.0 - - V dB ns Min Typ Max Unit 4. These parameters are guaranteed by design but not 100% tested in production. TYPICAL PERFORMANCE CHARACTERISTICS Open Voltage Gain (dB) RF = 1 M 60 RF = 300 k RF = 100 k 40 RF = 30 k Duty-Cycle (One Output) - % 80 RF = 50 VIN = 20 V TA = 25C VIN = 20 V RT = 2700 TA = 25C 40 30 CT = 10 F CT = 1 F 20 20 0 RF is impedance to ground. Values below 30 k will begin to limit the maximum duty-cycle. 100 1k 10 k Frequency (Hz) 100 k 1M 10 0 0 1 2 3 4 5 Input Voltage VIN Figure 2. Error Amplifier Voltage Gain vs. Frequency Over RF Figure 3. Duty Cycle vs. Input Voltage http://onsemi.com 4 CS3524A 10 9 Quiescent Current (mA) Output (V) 8 7 6 5 4 3 2 1 0 0 10 Note: Outputs off. RT = 20 30 40 50 Input (V) TA = -55C TA = 25C TA = 125C 20 15 10 5 0 5 4 3 2 1 0 VIN = 20 V RL = 2 k TA = 25C Input at VOB Output at VOA or VOB Note: Minimum input pulse width to latch is 200 ns. 0 1 2 3 Delay Time (s) Supply Voltage VIN (V) Figure 4. Quiescent Supply Current vs. Supply Voltage Over Temperature Figure 5. Shutdown Delay from PWM Comparator 1M 1 Oscillator Frequency (Hz) 2 3 4 10 k 5 100 k VIN = 20 V TA = 25C Output Dead Time (s) 10 5.0 VIN = 20 V RT = 2700 TA = 25C 2.0 1.0 0.5 Note: Dead time = osc output pulse width plus output delay 2 5 10 20 50 100 1. CT = 1.0 nF 2. CT = 3.0 nF 1k 3. CT = 10 nF 4. CT = 30 nF 5. CT = 100 nF 100 1 2 f [ 1.15 RTCT 5 10 20 50 100 Timing Resistor, RT (k) 0.2 0.1 1 Timing Capacitor, CT (nF) Figure 6. Oscillator Frequency vs. Timing Components Resistor Over Timing Capacitance Figure 7. Output Dead Time vs. Timing Capacitor Value Output at COMP 6 5 4 3 2 1 0 Output (V) Output (V) Overdrive 5% 10% 20% 50% 20 15 10 5 0 Input (V) Output at VOA or VOB VIN = 20 V RL = 2.0 k TA = 25C Input (V) 0.2 0.1 0 0 Input at ISENSE+ 1.0 0.5 0 Note: Minimum input pulse width to latch is 200 ns. 0 1 2 3 Delay Time (s) Input at Shutdown VIN = 20 V, TA = 25C EA+ = VREF ISENSE- = GND 1 2 Delay Time (s) 3 4 Figure 8. Current Limit Amplifier Delay Figure 9. Turn-Off Delay from Shutdown http://onsemi.com 5 CS3524A 5 4 VCE Sat (V) 3 TA = 125C 2 TA = 25C TA = -55C 1 0 0 50 100 150 200 250 Output Collector Current (mA) Figure 10. Output Saturation Voltage vs. Output Current Over Temperature VCC 2 k 1W VIN SYNC VREF SHUTDOWN CS3524A ISENSE+ ISENSE- VOUTA VOUTB EA GND EB 2 k 1W IS 100 k 100 k COMP EA+ EA- CT RT SHUTDOWN 2 k 0.1 RT CT 10 k 0.1 2 k 10 k 1 k Figure 11. Open Loop Test Circuit Note: The CS3524A should be able to be tested in any 3524 test circuit with two possible exceptions: 1. The higher gain-bandwidth of the current limit amplifier in the CS3524A may cause oscillations in an uncompensated 3524 test circuit. 2. The effect of the shutdown cannot be seen at the compensation terminal, but must be observed at the outputs. http://onsemi.com 6 CS3524A PACKAGE DIMENSIONS DIP-16 N SUFFIX CASE 648-08 ISSUE R -A- 16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 B 1 8 F S C L -T- H G D 16 PL SEATING PLANE K J TA M M 0.25 (0.010) M SO-16L DW SUFFIX CASE 751G-03 ISSUE B D 16 M 9 A q NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 10.15 10.45 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ H B 1 16X 8 B TA S B B S 0.25 M A h X 45_ SEATING PLANE M 8X 0.25 E A1 14X e T C PACKAGE THERMAL DATA Parameter RJC RJA Typical Typical DIP-16 42 80 SO-16L 23 105 Unit C/W C/W http://onsemi.com 7 L CS3524A ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303-675-2167 or 800-344-3810 Toll Free USA/Canada N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (Mon-Fri 2:30pm to 7:00pm CET) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (Mon-Fri 2:00pm to 7:00pm CET) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (Mon-Fri 12:00pm to 5:00pm GMT) Email: ONlit@hibbertco.com EUROPEAN TOLL-FREE ACCESS*: 00-800-4422-3781 *Available from Germany, France, Italy, UK, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: 303-308-7143 (Mon-Fri 8:00am to 5:00pm MST) Email: ONlit-spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001-800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2745 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 CS3524A/D |
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